NAME
perf-list - List all symbolic event typesSYNOPSIS
perf list [--no-desc] [--long-desc] [hw|sw|cache|tracepoint|pmu|sdt|metric|metricgroup|event_glob]
DESCRIPTION
This command displays the symbolic event types which can be selected in the various perf commands with the -e option.OPTIONS
-d, --descPrint extra event descriptions.
(default)
Don’t print descriptions.
Print longer event descriptions.
Enable debugging output.
Print how named events are resolved internally
into perf events, and also any extra expressions computed by perf stat.
Print deprecated events. By default the
deprecated events are hidden.
Print events applying cpu with this type for
hybrid platform (e.g. --cputype core or --cputype atom)
EVENT MODIFIERS
Events can optionally have a modifier by appending a colon and one or more modifiers. Modifiers allow the user to restrict the events to be counted. The following modifiers exist:u - user-space counting k - kernel counting h - hypervisor counting I - non idle counting G - guest counting (in KVM guests) H - host counting (not in KVM guests) p - precise level P - use maximum detected precise level S - read sample value (PERF_SAMPLE_READ) D - pin the event to the PMU W - group is weak and will fallback to non-group if not schedulable, e - group or event are exclusive and do not share the PMU b - use BPF aggregration (see perf stat --bpf-counters)
0 - SAMPLE_IP can have arbitrary skid 1 - SAMPLE_IP must have constant skid 2 - SAMPLE_IP requested to have 0 skid 3 - SAMPLE_IP must have 0 skid, or uses randomization to avoid sample shadowing effects.
perf record -a -e cpu-cycles:p ... # use ibs op counting cycles perf record -a -e r076:p ... # same as -e cpu-cycles:p perf record -a -e r0C1:p ... # use ibs op counting micro-ops
RAW HARDWARE EVENT DESCRIPTOR
Even when an event is not available in a symbolic form within perf right now, it can be encoded in a per processor specific way.Event Umask Event Mask Num. Value Mnemonic Description Comment
A8H 01H LSD.UOPS Counts the number of micro-ops Use cmask=1 and delivered by loop stream detector invert to count cycles
perf stat -e r1a8 -a sleep 1 perf record -e r1a8 ...
perf record -e r1a8 -a sleep 1 perf record -e cpu/r1a8/ ... perf record -e cpu/r0x1a8/ ...
cat /sys/bus/event_source/devices/<pmu>/format/<config>
Event Umask Event Mask Num. Value Mnemonic Description
28FH 03H op_cache_hit_miss.op_cache_hit Counts Op Cache micro-tag hit events.
cat /sys/bus/event_source/devices/cpu/format/event
perf stat -e r20000038f -a sleep 1 perf record -e r20000038f ...
perf record -e r20000038f -a sleep 1 perf record -e cpu/r20000038f/ ... perf record -e cpu/r0x20000038f/ ...
ARBITRARY PMUS
perf also supports an extended syntax for specifying raw parameters to PMUs. Using this typically requires looking up the specific event in the CPU vendor specific documentation.ls /sys/devices/*/format
perf stat -e cpu/event=0xa8,umask=0x1,name=LSD.UOPS_CYCLES,cmask=0x1/ ...
or using extended name syntax
perf stat -e cpu/event=0xa8,umask=0x1,cmask=0x1,name=\'LSD.UOPS_CYCLES:cmask=0x1\'/ ...
PER SOCKET PMUS
Some PMUs are not associated with a core, but with a whole CPU socket. Events on these PMUs generally cannot be sampled, but only counted globally with perf stat -a. They can be bound to one logical CPU, but will measure all the CPUs in the same socket.perf stat -C 0 -a uncore_imc_0/cas_count_read/,uncore_imc_0/cas_count_write/ -I 1000 ...
perf stat -C 0 -a imc/cas_count_read/,imc/cas_count_write/ -I 1000 ... perf stat -C 0 -a *imc*/cas_count_read/,*imc*/cas_count_write/ -I 1000 ...
perf stat -I 1000 -e power/energy-cores/ -a
ACCESS RESTRICTIONS
For non root users generally only context switched PMU events are available. This is normally only the events in the cpu PMU, the predefined events like cycles and instructions and some software events.TRACING
Some PMUs control advanced hardware tracing capabilities, such as Intel PT, that allows low overhead execution tracing. These are described in a separate intel-pt.txt document.PARAMETERIZED EVENTS
Some pmu events listed by perf-list will be displayed with ? in them. For example:hv_gpci/dtbp_ptitc,phys_processor_idx=?/
perf stat -C 0 -e 'hv_gpci/dtbp_ptitc,phys_processor_idx=0x2/' ...
perf stat -e cpu/event=0,umask=0x3,percore=1/
EVENT GROUPS
Perf supports time based multiplexing of events, when the number of events active exceeds the number of hardware performance counters. Multiplexing can cause measurement errors when the workload changes its execution profile.perf stat -e '{instructions,cycles}' ...
echo 0 > /proc/sys/kernel/nmi_watchdog
LEADER SAMPLING
perf also supports group leader sampling using the :S specifier.perf record -e '{cycles,instructions}:S' ... perf report --group
OPTIONS
Without options all known events will be listed. 1.hw or hardware to list
hardware events such as cache-misses, etc.
2.sw or software to list
software events such as context switches, etc.
3.cache or hwcache to list
hardware cache events such as L1-dcache-loads, etc.
4.tracepoint to list all tracepoint
events, alternatively use subsys_glob:event_glob to filter by
tracepoint subsystems such as sched, block, etc.
5.pmu to print the kernel supplied PMU
events.
6.sdt to list all Statically Defined
Tracepoint events.
7.metric to list metrics
8.metricgroup to list metricgroups
with metrics.
9.If none of the above is matched, it will
apply the supplied glob to all events, printing the ones that match.
10.As a last resort, it will do a substring
search in all event names.
1.--raw-dump, shows the raw-dump of
all the events.
2.--raw-dump
[hw|sw|cache|tracepoint|pmu|event_glob], shows the raw-dump of a certain
kind of events.
SEE ALSO
perf-stat(1), perf-top(1), perf-record(1), Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 3B: System Programming Guide <http://www.intel.com/sdm/>, AMD Processor Programming Reference (PPR) <https://bugzilla.kernel.org/show_bug.cgi?id=206537>2024-06-21 | perf |